ọja-ini
ORISI
ṢÀpèjúwe
ẹka
Idapọpọ Circuit (IC)
Ti a fi sii – CPLD (Ẹrọ Iṣaro Iṣaṣepọ)
olupese
Intel
jara
MAX® II
Package
atẹ
Ipo ọja
o wa
Iru siseto
Eto ninu eto
Akoko idaduro tpd (1) max
4.7ns
Ipese Foliteji - Ti abẹnu
2.5V, 3.3V
Nọmba ti kannaa eroja / ohun amorindun
240
nọmba ti macrocells
192
Iwọn I/O
80
otutu iṣẹ
0°C ~ 85°C (TJ)
fifi sori iru
Dada Oke Iru
Package / apade
100-TQFP
Iṣakojọpọ Ẹrọ Olupese
100-TQFP (14× 14)
Nọmba ọja ipilẹ
EPM240
Media ati awọn gbigba lati ayelujara
ORIṢẸRẸ
ỌNA ASOPỌ
Awọn pato
Max II Device Bere fun Itọsọna
PCN ọja Change / dawọ
Mult Dev EOL 4/Dec/2020
MAX II EOL-iyipada 19/Mar/2021
PCN Design / sipesifikesonu
Quartus SW/Web Chgs 23/Sep/2021
Imudojuiwọn ifarahan 30/Mar/2015
PCN package
Mult Dev Label CHG 24/Jan/2020
Mult Dev Label Chgs 24/Feb/2020
HTML pato
Max II Device Bere fun Itọsọna
EDA / CAD awoṣe
EPM240T100C5N nipasẹ SnapEDA
EPM240T100C5N nipasẹ Ultra Librarian
Errata
MAX II Device Ìdílé Errata
Ayika ati Okeere Classification
ÀWỌN ànímọ́
ṢÀpèjúwe
Ipo RoHS
RoHS ni ibamu
Ipele Ifamọ Ọrinrin (MSL)
3 (wakati 168)
Ipo REACH
Awọn ọja ti kii ṣe de ọdọ
ECCN
EAR99
HTSUS
8542.39.0001
